As the density of integrated circuitry (IC) devices increases, continuing challenges are posed to find interconnect structures which are suitable for use with such densely-packed IC devices. For example, as clock cycles increase, interconnect structures which are capable of handling such clock cycles become necessary. Further, such interconnect structures must overcome concerns associated with signal propagation times, crosstalk, increased system noise and other spurious electrical effects which are detrimental to the performance of integrated circuits.
This invention arose out of concerns associated with providing integrated circuitry interconnect structures which are suitable for use with densely-packed, high-speed integrated circuitry devices.